1. Field of the Invention
The present invention relates to a microcomputer and a method of optimizing the microcomputer.
2. Description of the Related Art
In association with the advancement of a semiconductor technology, a microcomputer has been popular in which a plurality of circuit function blocks, especially, a CPU and memories such as RAM or ROM are provided inside a single chip. Recently, a microcomputer including a nonvolatile memory such as a flash memory has been supplied. The nonvolatile memory provided in the microcomputer has an analog circuit such as a charging pump circuit. A variation in manufacture of the microcomputer causes a variation of characteristics of the analog circuit. Thus, in order to keep the performance and quality of the microcomputer, it is necessary to optimize read/write operations to the nonvolatile memory before the internal CPU starts its operation. A technique for optimizing the nonvolatile memory is disclosed in Japanese Laid Open Patent Application (JP-P2003-178589A) as a first conventional example.
In the first conventional example, an initial setting data region is provided in a usual memory cell array to write an initial setting data therein. The initial setting data is automatically read out by a decoding circuit and sensed by a sense amplifying circuit, in a same way as a usual data reading operation after a power source is turned on. Then, the sensed data is latched in a latching circuit. In such a nonvolatile memory, when an amount of the initial setting data is large, a long wait time is needed until the completion of the read operation of the initial setting data after the power source is turned on, or a verifying operation is completed.
The above conventional nonvolatile memory is provided with the memory cell array for storing the initial setting data to define a memory operation condition; a control circuit for controlling read/write/erase operations to the memory cell array; a decoding circuit for selecting memory cells of the memory cell array in accordance with an access signal; a sense amplifying circuit for sensing and amplifying a data read out from the selected memory cells; a latching circuit for latching the initial setting data; and a clock generating circuit for generating a clock signal to define operation timing of the control circuit. In order to shorten the above wait time, the control circuit reads out a clock cycle adjustment data contained in the initial setting data after the power source is turned on, and adjusts a period of a clock signal generated from the clock generating circuit based on the clock cycle adjustment data. Then, the control circuit reads out the remaining initial setting data in accordance with the adjusted clock signal.
As described above, in the first conventional example, the read operation of the initial setting data is carried out before read timing optimal for the nonvolatile memory is set. In order to read out data from the nonvolatile memory on which the optimization (adjustment) of the reading timing is not yet carried out, the clock signal whose frequency is low is required to be used as a read clock signal.
Here, when the technique of the first conventional example is applied to the microcomputer, the setting of the initial setting data is carried out in the period until the CPU starts to operate after the power source is turned on or after a reset state is released. In this period, the microcomputer operates in synchronization with the read clock signal having a low frequency. Thus, there may be a case where a long time is required until the operation start of the CPU after the power source of the microcomputer is turned on or after the reset is carried out.